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Photo Release -- Tabula Introduces Breakthrough Spacetime(TM) Programmable Logic Architecture
GlobeNewswire
2010-03-01

      3-Dimensional Architecture Will Enable New Category of
     Programmable Logic Devices With Unmatched Capability and
                           Affordability

SANTA CLARA, Calif., March 1, 2010 (GLOBE NEWSWIRE) -- Tabula, Inc., a
privately held fabless semiconductor company developing 3-D
Programmable Logic Devices (3PLD), today introduced Spacetime, a
groundbreaking programmable logic architecture that uses time as a
third dimension to deliver unmatched capability and affordability.
Tabula achieves this breakthrough by combining the Spacetime hardware
that dynamically reconfigures logic, memory, and interconnect at
multi-GHz rates with the Spacetime compiler that manages this
ultra-rapid reconfiguration transparently. Tabula will leverage
Spacetime to deliver 3-D devices that have significant density
advantages and dramatically shorter interconnects when compared to
FPGAs that use 2-D architectures. In addition, Tabula will deliver
these benefits while preserving a traditional design methodology. As a
result, Spacetime will enable a new class of programmable devices that
combines the capability of an ASIC with the ease of use of an FPGA at
price points suitable for volume production.

"The key to Spacetime and its many advantages is resolving the
interconnect problem intrinsic to FPGAs," said Steve Teig, Tabula's
President and CTO. "Almost 90% of the core area of FPGAs is devoted to
the implementation and control of interconnect. Besides driving up die
size and product cost, the long connections also limit performance and
make timing closure more difficult. If you're going to achieve a
breakthrough in programmable capability and affordability, you have to
make the interconnect more efficient, and that's what Spacetime does."

Tabula was founded by EDA pioneer Steve Teig and is led by Dennis
Segers, former CEO of Matrix Semiconductor and former Senior Vice
President and member of the board of directors at Xilinx. With support
from premier venture capitalists including Greylock Partners, Benchmark
Capital, New Enterprise Associates, Crosslink Capital, Balderton
Capital, DAG Ventures, and Integral Capital, Tabula has over 80 patents
granted around the Spacetime architecture with over 70 more pending.
Tabula is developing a family of general-purpose 3PLD devices that are
based on the Spacetime architecture. Tabula will initially target the
programmable logic market but will also extend the benefits of
programmability into markets that FPGAs cannot serve cost-effectively.

"Tabula's Spacetime technology is a real innovation, not just hype,"
said Tom R. Halfhill, senior analyst for In-Stat's Microprocessor
Report. "By rapidly reconfiguring their programmable-logic fabric -- up
to 1.6 billion times per second -- Tabula's chips can use the same
logic gates and wires over and over again for different purposes. To
developers, the fabric looks much larger than it really is, without
paying for additional silicon and power. Perhaps the biggest innovation
is that Tabula's development tools hide the details of rapid
reconfiguration from developers and users. Tabula's 3PLDs have only one
die, but they emulate a three-dimensional PLD that stacks multiple
chips in a single package."

"The programmable logic market is one of the most profitable segments
of the semiconductor industry," said Dennis Segers, CEO of Tabula. "It
was once one of the fastest growing as well, driven by rapid
advancements in FPGA capability alongside Moore's Law. Since 2000,
however, there has been only incremental improvement in FPGA
architectures and circuits from the market leaders, leaving
programmable logic customers underserved and limiting growth for the
industry segment. With the Spacetime architecture, Tabula will bring
unprecedented value into the programmable logic space, restoring
innovation into this formerly vibrant market and accelerating its
growth."

Spacetime Architecture Overview

A Spacetime device reconfigures on the fly at multi-GHz rates,
executing each portion of a design in an automatically defined sequence
of steps. Although manufactured using a standard CMOS process,
Spacetime uses this ultra-rapid reconfiguration to make Time a third
dimension (Figure 1), resulting in a 3-D device with multiple layers or
folds in which computation and signal transmission can occur. Each fold
performs a portion of the desired function and stores the result in
place. When some or all of a fold is reconfigured, it uses the locally
stored data to perform the next portion of the function. By rapidly
reconfiguring to execute different portions of each function, a 3-D
Spacetime device can implement a complex design using only a small
fraction of the resources that would be required by an inherently 2-D
FPGA. A designer can realize all of the benefits of 3-D within a
familiar methodology using the Spacetime compiler that automatically
maps standard RTL into Spacetime.

Spacetime devices will provide significantly higher logic, memory and
signal processing capabilities than FPGAs, and their much higher
density makes them suitable for volume production. In fact, when
compared to 40 nm FPGAs, a 40 nm Spacetime device will deliver


  --  2.5x higher logic density,
  --  2.0x higher memory density,
  --  2.9x higher memory ports, and
  --  3.7x higher DSP performance                




A photo accompanying this release is available at
http://www.globenewswire.com/newsroom/prs/?pkgid=7138

The Spacetime logo is available at
http://www.globenewswire.com/newsroom/prs/?pkgid=7136

About Tabula

Tabula is a privately held fabless semiconductor company developing 3-D
Programmable Logic Devices (3PLD) based on Tabula's patented Spacetime
architecture. Spacetime uses time as a third dimension to advance logic
density, memory capability and signal processing performance while
preserving a traditional design flow. Headquartered in Santa Clara,
California, Tabula has over 100 employees and has assembled a
leadership team consisting of industry veterans and successful
entrepreneurs. Tabula is backed by top-tier investors with a long-term
view toward enduring market leadership. For more information, please
visit the Tabula website at www.tabula.com.

The Tabula Inc. logo is available at
http://www.globenewswire.com/newsroom/prs/?pkgid=7135

The photo is also available at Newscom, www.newscom.com, and via AP
PhotoExpress.


CONTACT:  Morphoses
          Public Relations and Marketing
          Thomas H. Krause Jr., Managing Partner
          Sabrina Joseph, Managing Partner
          (408)236-7373
          tabulapr@morphoses.com
          560 S. Winchester Blvd., Suite 500
          San Jose, CA 95128